中国邮电高校学报(英文) ›› 2009, Vol. 16 ›› Issue (1): 121-126.doi: 10.1016/S1005-8885(08)60191-0

• Computer Architecture • 上一篇    

Dynamic cache resources allocation for energy efficiency

陈黎明, ZOU Xue-cheng, LEI Jian-ming, LIU Zheng-lin   

  1. Department of Electronics Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2009-02-26
  • 通讯作者: 陈黎明

Dynamic cache resources allocation for energy efficiency

CHEN Li-ming, ZOU Xue-cheng, LEI Jian-ming, LIU Zheng-lin   

  1. Department of Electronics Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China
  • Received:1900-01-01 Revised:1900-01-01 Online:2009-02-26
  • Contact: CHEN Li-ming,

摘要:

This article proposes a mechanism of low overhead and less runtime, termed dynamic cache resources allocation (DCRA), which allocates each application with required cache resources. The mechanism collects cache hit-miss information at runtime and then analyzes the information and decides how many cache resources should be allocated to the current executing application. The amount of cache resources varies dynamically to reduce the total number of misses and energy consumption. The study of several applications from SPEC2000 shows that significant energy saving is achieved for the application based on the DCRA with an average of 39% savings.

关键词:

cache,;energy;consumption,;microprocessor

Abstract:

This article proposes a mechanism of low overhead and less runtime, termed dynamic cache resources allocation (DCRA), which allocates each application with required cache resources. The mechanism collects cache hit-miss information at runtime and then analyzes the information and decides how many cache resources should be allocated to the current executing application. The amount of cache resources varies dynamically to reduce the total number of misses and energy consumption. The study of several applications from SPEC2000 shows that significant energy saving is achieved for the application based on the DCRA with an average of 39% savings.

Key words:

cache;energy consumption;microprocessor